Order Number DM54LSJ, DM54LSW, DM74LSWM or DM74LSN. See Package Number J20A, M20B, N20A or W20A 2. Download Fairchild Semiconductor DM74LSN pdf datasheet file. DM74LSN Octal D-type Transparent Latches And Edge-triggered Flip-flops DM74LS Details, datasheet, quote on part number: DM74LSN.

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This documentation concerns the 64 channel Digitiser Data Boards designed dk74ls374n These boards were developed for use in Pulsar research. There are nine data boards in the crate supplied, thus allowing up to channels to be digitised. These boards are controlled by one Control Board in the same crate.

This reads data from each board and writes the data to a computer interface along with a count word. Full circuit details and user instructions for the control board are in a separate document. The signal is passed through a 0. An integration is then performed across datashewt precision pF capacitor for a single sample interval.

The sign sm74ls374n the output of the integrator is detected by a comparator, the output of which is written onto one bit of a 64 bit data register comprising a D-type latch. Before each integration commences, the switch is closed to discharge the integration capacitor, C2.

Refer to the complete schematic diagram at the end of this section. To describe the operation of the circuit, channel 1 is used as an example. The operation is dstasheet for all 64 channels. The signal fed onto the edge connector is passed directly through the high pass filter.

This comprises a 2M resistor package RA1A, and 0. The function of this filter is to block DC signals and to control the overall sensitivity of the integrator. This is a low noise dual switched integrator that has a built in precision pF capacitor for integration. The two unused controls are pulled high by resistors R1 and R2. The integration period is determined by the separate control board.


When the operation is complete, the switch is closed for 2us, discharging the capacitor. This IC is a quad programmable comparator selected for its low and repeatable input offset voltages. If the signal is more positive than daasheet level, the output will switch low and if more negative, it will switch high. The output of the comparator is open collector and is thus virtually isolated from the input terminals.

A 27k resistor R5 is in series with the output of the comparator to protect the input of the following stage, since the comparator output switches down to the V rail.

The digital signal is finally staticized by U7, 74LS This is an octal D-type flip flop with tri-state outputs. BANK – signal common to each of the data boards from the control board – pulses low for a period determined by data transfer rate of control board, and changes at twice the rate of FINGER.

Test Switches Datashee are two switches on the board selected by jumpers.

DM74LSN Fairchild Semiconductor, DM74LSN Datasheet

They are provided to facilitate board testing. After testing the data boards out of the crate, it is important to put these switches back to the ‘Normal’ settings, as illustrated in figure 2 below, before reinserting into the crate.

Failure to do this could result in data bus contention. The typical current requirements are:.

DM74LS374N 数据手册 ( 数据表 ) – Fairchild Semiconductor

There is a separate regulator for the digital Vcc, U This power rail separation is to reduce power born noise.


The shielding is provided by the partial groundplane on the component side of the board. All digital grounds are linked to this plane. This is made up of a network of tracks over the board. This is to supplement an incomplete track. Nearby C, there are two diodes D1, and D2.

These are wired back to back between the two ground levels. During operation there is a potential of mV or less between these two datasheet. There is considerable decoupling throughout the board. Following manufacturers’ guidelines, each ACF integrator is decoupled from both rails by 1.

Each comparator package is decoupled from both power rails by 10nF capacitors. Secondly, the component pads adjacent to the ACF packages allow for the addition of a capacitor in parallel to the internal pF.

This would reduce the gain. These capacitors are identified on the data board and in the schematic as C through C The digitiser data board dm74ls3774n designed, developed, fabricated and tested by the author. It is a modification to a previous design of This was required due to the obsolescence of the comparators previously used. The schematic circuit was drawn using OrCAD software. The file is in the same archive, under:. Manufacturers of the board were Precision Engineering Products Chesterton Ltd, who will retain the production artwork for a limited time.

The works reference is:.